Are you seeing Expect <value> Simulate X?
– If yes, do you have timing violation messages during simulation? Any
timing violations result in the FF output being set to “X”. Fix these
violations.
You can use ATPG tool that will simulate your pattern and shows the expected value which you can compare with your actual value and track back where the difference starts in schematic.
Check with your atpg tool website, usually there is an application note on how to diagnose simulation miscompare for ATPG.