nemolee
Full Member level 3
gate count estimation
Hello,
I don't have ASIC synthesis tool, but I have FPGA synthesis tool. I synthesis my RTL code according to FPGA synthesis tool. And I get the total number of logic cell used in this design. How can I transfer logic cell count to gate count?
BR,
NemOlee
Hello,
I don't have ASIC synthesis tool, but I have FPGA synthesis tool. I synthesis my RTL code according to FPGA synthesis tool. And I get the total number of logic cell used in this design. How can I transfer logic cell count to gate count?
BR,
NemOlee