EDA_hg81
Advanced Member level 2
signal pin signal has no driver
R_REG( 7 down to 0 ) gets the input signal from the top module. I have assigned each input pin with a specific pad on FPGA ( spartan3 ).
Such as:
NET "DATA_IN_QER<0>" LOC = "K3" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<1>" LOC = "H3" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<2>" LOC = "H1" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<3>" LOC = "G2" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<4>" LOC = "G1" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<5>" LOC = "F3" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<6>" LOC = "F2" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<7>" LOC = "E4" | IOSTANDARD = LVTTL ;
But Why I got the following warnings?
WARNINGar:275 - The signal R_REG<3> has no driver
WARNINGar:275 - The signal R_REG<2> has no driver
WARNINGar:275 - The signal R_REG<1> has no driver
WARNINGar:275 - The signal R_REG<0> has no driver
Any suggestions are appreciated.
R_REG( 7 down to 0 ) gets the input signal from the top module. I have assigned each input pin with a specific pad on FPGA ( spartan3 ).
Such as:
NET "DATA_IN_QER<0>" LOC = "K3" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<1>" LOC = "H3" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<2>" LOC = "H1" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<3>" LOC = "G2" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<4>" LOC = "G1" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<5>" LOC = "F3" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<6>" LOC = "F2" | IOSTANDARD = LVTTL ;
NET "DATA_IN_QER<7>" LOC = "E4" | IOSTANDARD = LVTTL ;
But Why I got the following warnings?
WARNINGar:275 - The signal R_REG<3> has no driver
WARNINGar:275 - The signal R_REG<2> has no driver
WARNINGar:275 - The signal R_REG<1> has no driver
WARNINGar:275 - The signal R_REG<0> has no driver
Any suggestions are appreciated.