fpga lut
It's hard to compare. When an FPGA give a number of gate, it's really a rough estimate.
A LUT can combine up to 4 inputs to give a single output. Plus, in an FPGA, the LUT are not the only elements. For example, registers (flip-flop) can account for a few gates in an ASIC.
The is really something that depend on the specific project. The best way to really know is to synthesize for FPGA, then see, after the mapping, how many logic blocks are used. Then, you can know what range of FPGA are optimal for that project.
Roughly, if the design is 30K gates, it should fit without problem in a 50K gates FPGA. But then, that depend on the applications. Remember that gates are only an estimate on FPGA, which assume that you use some % of your FPGA as distributed RAM for example.