ldm
Member level 1
Does 'FPGA Low Power Design' sound strange? If not, what techniques should be used? Are the techniques similar to ones, which popular in ASIC Low Power designs (gated clocks, etc.) or there any specific?
Follow along with the video below to see how to install our site as a web app on your home screen.
Note: This feature may not be available in some browsers.
ldm said:Does 'FPGA Low Power Design' sound strange? If not, what techniques should be used? Are the techniques similar to ones, which popular in ASIC Low Power designs (gated clocks, etc.) or there any specific?