FPGA design ( voltage related)

[Nandini Ganig]

Hi all,

Can we drive the input pins above the supply level of the VCCIO regulator?

Thanks in advance,
Nandini

 

[Dan Mills]

Check the datasheets for your part, but it is generally not a good idea.

Some parts will allow it in some cases for example a 2.5v signal to drive a 1.8v io standard pin (some of the Altera stuff IIRC), but you want to be very careful with 3.3v stuff (and watch out for overshoot and ringing, fpga pin buffers are more then fast enough for this to be an issue).

Note that this also depends on exactly how you have configured the IO pin, sometimes clamp diodes are optional and sometimes you can get away with it with sufficient series resistance, the data sheet will reveal all.

Regards, Dan.

 

[Nandini Ganig]

Can we use 1.8 regulator to drive 3.3 input pin

Thanks in advance,
Nandini

 

[sorkam]

Can we use 1.8 regulator to drive 3.3 input pin

Thanks in advance,
Nandini

can not drive 3.3 V IO pin using 1.8 V source.

check that pin minimum input voltagte high level value before connecting any voltage source.

i think 3.3 V can drive VIH_min = 0.65*3.3= 2.15V

can not drive 3.3V IO pin using 1.8V source.
check that pin minimum input voltagte high level value before connecting any voltage source.

3.3v can drive VIH_min = 0.65*3.3= around 2..15V

 

[GLJLQ]

the structure of the output can you program. if you can , you can set the structure of the ouptut as OD.
in this way you can use 3.3V IO to drive 1.8V IO