Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Your last two waveforms appear to be current flow in the secondary side. Is this correct?
It rings, or wanders, while the mosfet is on (and sometimes when it's off, in some circumstances). I see similar waveforms (in simulation) when the snubber network is a low resistance. This results in ringing, and odd-shaped current waveforms in both sides of the transformer.
Sorry the first wave form is feedback pin ie giving close to 2.5V, second and third are gate pulses, you can see a narrow pulse coming in between, it was intended to switch at 100kHz but varying too far 20kHz range so i thought , this may be caused by current sense spike so 4,5,6 shows current sense waveform with best of my probing techniques..
7,8 shows drain wave form..
Can anyone please help me to trouble shoot..
Initially the circuit was really unstable and producing gret noise in transformer..
I reduced the feedback gain Rf from 100k to 3.3k then the switching frequency i got was 50kHz..
then reading the datasheet where 3.3k was below the recommended value so i raised it upto 10k..now the fsw changed to 20k range any clues what might be a problem here..?
subharmonic oscillation or current sense noise? ..Any help will be greatly appreciated..
After much pondering and time consuming tests..i was able to correct the problem( or at least a part of it) of instability in the circuit...But the funny thing is still i dunno the exact reason how its getting solved but it definitely works..I will be much appreciating if anyone can give me a clue..
I will try once again to state the problem
I've did a flyback converter in CCM mode using UC3842 primary inductance 3.75mH turns ratio = 10,fws=100kHz designed to operate at 50% duty with no slope compensation.
VIN 85VAC-265AC OUT=12V,2A
it was supposed to be be a text book design but it wasn't to my disappointment
1. After turning ON the circuit for testing at VIN =90VAC,Im getting only fsw<40kHz like 20kHz or some thing ..designed is 100kHz !!!.Complete problems..nothing works as expected..I'm scratching my head...
2. After some observations I reduced the feedback gain Rf from 100k to 10k then the switching frequency i got was 50 kHz..Still it was problematic..
3.I was stuck in this scenario.. couldn't move much..some times i observed oscillations at FB pins so did some tweakings at capacitors and got oscillations free.But whatever i do... i cant raise the fsw to 100kHz its stuck at 50kHz
I think apart from feed back oscillation problem , the CCM operation and close to 50% duty pushed the converter to instability during when the current ramp reached the threshold to ensure PWM latch.
I've still not included slope compensation..converter operates close to 50% duty..I think it may be required as im using UC3842 which is 100% duty capable....
The 3842 uses a flip flop to generate the PWM. The flip flop turns on from the internal oscillator, and the current ramp turns it off.
It cannot glitch briefly on and off during the "on" period the way you are seeing, so it has to be a noise problem.
Check your grounding, and follow the Unitrode application note suggestions about board layout, and recommended supply decoupling on the dc input, power supply to the output stage, and the five volt reference.
Its almost working, but sometimes these types of problems can be much worse on a breadboard prototype than the final circuit board.
In addition to what's said by Warpspeed about noise problems, I must confess that I'm unable to recognize from your oscilloscope wavefroms why you don't achieve 100 kHz.
The 3842 oscillator is free running, so you should primarly see 100 kHz ocillator frequency at the RtCt pin, isn't it? But it's impossible to see if the oscillator is actually operating at 100 kHz. If so, each oscillator pulse would trigger the output latch unless UVLO or current sense comparator is blocking it.