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manish12 said:is it double precision or single ?
can any one check it ????????
manish12 said:is it double precision or single ?
can any one check it ????????
I have made this VHDL implementation of floating point addition, subtraction, multiplication, division and square root. You can look at it or use it if you wont. Its in the atachment.
I have made this VHDL implementation of floating point addition, subtraction, multiplication, division and square root. You can look at it or use it if you wont. Its in the atachment.
I have made this VHDL implementation of floating point addition, subtraction, multiplication, division and square root. You can look at it or use it if you wont. Its in the atachment.
But that can only be fully utilized, I assume, with the rest of the design using the FP core being pipelined ? Anyways, thanks, I think I'll stick to fixed point atmIts not like you put 1 value in an wait 48 clocks for a result... The pipelining will always alway 1 entry per clock.