heavenevil
Newbie level 3
Does any know about flipchip IO PAD? In our cadence design kit, I only see IO pad cell for wirebond chip, I think it's not suitable for flipchip, so anyone who has designed a flip chip PAD please give me some information, thanks. I searched google, no article related the flipchip IO cell design found, all of them talk about the routing...:???:
Just analog and VDD VSS pad are good for me, thanks. Or any documentation related to it are welcome.
Just analog and VDD VSS pad are good for me, thanks. Or any documentation related to it are welcome.