FFT IP core in xilinx

[suhas007]

Hello,
I'm new to xilinx.I actually dunno how to simulate FFT in xilinx using IP cores.How to give input for an 8 or 16 bit i/p.How to write a test bench.
Plz help me.

 

[joelby]

Please read and study XAPP199 - Writing Efficient Test Benches. Once you're comfortable with the construction of simple test benches, simulating the FFT shouldn't be much of a problem.

 

[suhas007]

Thx..........I was able to write test benches. Now,How can i read the input for FFT from a file and output the result to a file.

 

[guitarguy12387]

Verilog File I/0,Verilog file handling

 

[joelby]

How closely did you read the XAPP199 document? Under "Self-Checking Testbenches", there is an example for reading data from a vector file using VHDL's textio. To do the same in Verilog, you can use $readmemb or $readmemh (see "Reading Memory Initialization Files") or use $fopen, $fread, etc.

To save to a file, you can use VHDL textio or in Verilog, $fopen/$fwrite.