cvc_training
Newbie level 4
Fast-Track course on Verification Using SystemVerilog - Bangalore
Quick facts
When: 20th or 21st June (Fri/Sat)
Where: Bangalore, CVC Office (Ground Floor) (http://www.noveldv.com/contactus.html)
Cost: Rs. 4000 /- + ST (12.36 %) per attendee.
Contact: cvc.training @ gmail.com, +91-9916176014, +91-80-41495572
What’s SystemVerilog?
IEEE 1800, SystemVerilog is the de-facto language for Digital system Verification (and Design). Almost every ASIC team is either using it or plan on using it in the next project! It is a major extension to Verilog-2001, adding significant new features to Verilog for verification and design. Enhancements range from simple enhancements to existing constructs, addition of new language constructs to the inclusion of complete Object-Oriented paradigm features.
Terms & Conditions
· In general we require that the fee is paid in 100% prior to the start of the training.
· For large corporate with more number of attendees to account for their internal process we do allow an exception to the above rule; however we charge an additional 25% of the training cost per attendee in such cases. In case the fee is paid after the training, the payment should be made within 1 week after the training is delivered. Any additional delay shall be charged at 10% every additional day.
· Any "offer" price mentioned in the course announcement is applicable only for individual attendees and not for corporate.
Cancellation Policy
Course tuition is fully refundable up to one week before the class starts. Cancellations within a week (2-7 days) of the class start date will incur a 50% cancellation fee. Those who cancel fewer than 2 days prior to the class will be billed for the full amount of the tuition. A no-show will be treated as cancellation and no refund shall be given. For genuine cases of absence, we can provide a training token that the trainee can avail in one of the future training classes subject to space availability.
For further details visit www.sv-verif.blogspot.com
Quick facts
When: 20th or 21st June (Fri/Sat)
Where: Bangalore, CVC Office (Ground Floor) (http://www.noveldv.com/contactus.html)
Cost: Rs. 4000 /- + ST (12.36 %) per attendee.
Contact: cvc.training @ gmail.com, +91-9916176014, +91-80-41495572
What’s SystemVerilog?
IEEE 1800, SystemVerilog is the de-facto language for Digital system Verification (and Design). Almost every ASIC team is either using it or plan on using it in the next project! It is a major extension to Verilog-2001, adding significant new features to Verilog for verification and design. Enhancements range from simple enhancements to existing constructs, addition of new language constructs to the inclusion of complete Object-Oriented paradigm features.
Terms & Conditions
· In general we require that the fee is paid in 100% prior to the start of the training.
· For large corporate with more number of attendees to account for their internal process we do allow an exception to the above rule; however we charge an additional 25% of the training cost per attendee in such cases. In case the fee is paid after the training, the payment should be made within 1 week after the training is delivered. Any additional delay shall be charged at 10% every additional day.
· Any "offer" price mentioned in the course announcement is applicable only for individual attendees and not for corporate.
Cancellation Policy
Course tuition is fully refundable up to one week before the class starts. Cancellations within a week (2-7 days) of the class start date will incur a 50% cancellation fee. Those who cancel fewer than 2 days prior to the class will be billed for the full amount of the tuition. A no-show will be treated as cancellation and no refund shall be given. For genuine cases of absence, we can provide a training token that the trainee can avail in one of the future training classes subject to space availability.
For further details visit www.sv-verif.blogspot.com