You could go to the extracted view and highlight the net.
In some kits (I have seen this especially in power ASIC
technologies where numerous supply rails and partitions
are expected) there may be multiple metal layers where
some are allocated to power (e.g. you have Met1, VSS_Met1,
VDD_Met1, HV_Met1) and thay are "booleaned" together
at mask fab; the advantage is, you can easily highlight
anytime and you can use DRCs to find power shorts (provided
you stuck to the plan). This latter can be difficult if your
LVS doesn't have a good "shorts and opens" tool or its
heuristics are lame.