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always @(posedge clock or negedge Reset_n)
if !(Reset_n)
Enable <= 1'b0;
else
Enable <= !Enable;
always @(posedge clock or negedge Reset_n)
if !(Reset_n)
flop <= 1'b0;
else if (Enable)
flop <= !Flop;
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In the above, flop changes state every OTHER clock cycle.
So you could theorithically set for that 'flop' a multicycle path of 2 clocks (relaxed...)
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