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Clock latency is the amount of time that a clock signal takes to get from the ideal-waveform origin point to a specific register clock pin inside the design.
Clock latency consists of two parts, called the source latency and network latency.
Source latency is the amount of time the clock signal takes to get from its ideal-waveform origin point to the clock source. The source is the clock definition point in the design specified in the create_clock command.
Network latency is the amount of time the clock signal takes to get from the source to a register clock pin.
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