Error while simulating Verilog-A file in Hspice

Status
Not open for further replies.
J

Johnson

Advanced Member level 2
Joined
Oct 4, 2004
Messages
520
Helped
28
Reputation
56
Reaction score
7
Trophy points
1,298
Activity points
3,613
hsp-vacomp failed to compile verilog-a file

I was trying to simulate a sample Verilog-A file in Hspice, but I got this error. HSP_CML_CACHE is pointing to c:\EDA\CML\
What does it mean and how I can fix it?

** error **
During Verilog-A Device processing:
CML file does not exist
'c:\EDA\CML\1.46\c\\eda\synopsys\hspice_a-2007.09\demo\hspice\veriloga\\lib.win32\biterrorrate.cml'
 

Verilog-A

It is urgent! Any help?
 

Re: Verilog-A

When the HSPICE Verilog-A compiler runs it takes Verilog-A source and creates a compiled form called a compiled module library (CML) file. This is a DLL that subsequently gets loaded by HSPICE.

The system is saying the CML file does not exist so it's most likely that biterrorrate.va failed to compile for some reason. Since this is an example I would guess maybe you don't have a hspiceva license? or there is a problem with the installation.

Look in the lis file and/or the val file (the latter is the Verilog-A only log file). That might give you some clue as to why it failed to converge.

Patrick
 

Verilog-A

thank you, I saw val file, it was license problem!
 

Verilog-A

Hi, I have the same problem. How to handle it? and what is the "hsp-vacomp" lic? How to settle it?

Thank you!
Best regards
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…