help in ISE
How big is your design, and how big is your device?
If it's an FPGA, check the "device utilization summary" or "design summary" to see how many resources (flip-flops, block RAMs, I/O's, etc) were used. Do the numbers seem reasonable for your design? If not, maybe something went wrong during synthesis, such as RAM implemented as thousands of flops. Also check the synthesis report for suspicious warning messages.
Maybe helpful, "Area Reduction Strategies":
**broken link removed**