nakshathra
Junior Member level 1
The following code results the error: Line 74. Signal key_state has a multi-source.
The code is written for a keypad scanner.
I cannot make out why "key_state" turned out to be multi source signal.
Please help!!!!!!!!!!!!!!
-- Thanks in Advance!
The code is written for a keypad scanner.
I cannot make out why "key_state" turned out to be multi source signal.
Please help!!!!!!!!!!!!!!
-- Thanks in Advance!
Code:
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use IEEE.STD_LOGIC_arith.ALL;
use IEEE.STD_LOGIC_unsigned.ALL;
entity keypad is
port (
clk : in std_logic;
reset: in std_logic;
key_pulse : out std_logic;
key_code : out std_logic_vector(3 downto 0);
key_col : in std_logic_vector(3 downto 0);
key_row : out std_logic_vector(3 downto 0)
);
end keypad;
architecture rtl of keypad is
-- state machine states
type KEY_STATES is (pulse_row_1, read_row_1, pulse_row_2, read_row_2,
pulse_row_3, read_row_3, pulse_row_4, read_row_4);
signal key_state : KEY_STATES ;
signal clkcntr : std_logic_vector(15 downto 0) := (others=>'0');
signal state_inc : std_logic := '0';
signal scan_complete : std_logic := '0';
signal key_read : std_logic_vector(3 downto 0) := (others => '0');
signal keyread_sreg3 : std_logic_vector(3 downto 0) := (others => '0');
signal keyread_sreg2 : std_logic_vector(3 downto 0) := (others => '0');
signal keyread_sreg1 : std_logic_vector(3 downto 0) := (others => '0');
signal keyread_sreg0 : std_logic_vector(3 downto 0) := (others => '0');
begin
clkdiv : process (clk,reset)
begin
if reset = '1' then key_state<=pulse_row_1; key_code <= (others => '0');
elsif clk' event and clk = '1' then -- rising clock edge
-- default
state_inc <= '0';
-- pulse state_inc signal every 50,000 clock cycles
clkcntr <= clkcntr + 1;
if clkcntr = X"C350" then
clkcntr <= (others => '0');
state_inc <= '1';
end if;
end if;
end process clkdiv;
-- key scanner state machine
-- output pulse on each key row and check for keypress
key_scanner_sm : process (clk,reset)
begin -- process key_scanner
if (clk' event and clk = '1' and reset = '0') then
if state_inc = '1' then
-- reset scan_complete
scan_complete <= '0';
case key_state is
when pulse_row_1 =>
key_row <= "0111";
key_state <= read_row_1;
when read_row_1 =>
case key_col is
when "0111" => key_code <= "0001"; -- 1
when "1011" => key_code <= "0010"; -- 2
when "1101" => key_code <= "0011"; -- 3
when "1110" => key_code <= "0000"; -- A
when others => null;
end case;
key_state <= pulse_row_2;
when pulse_row_2 =>
key_row <= "1011";
key_state <= read_row_2;
when read_row_2 =>
case key_col is
when "0111" => key_code <= "0100"; -- 4
when "1011" => key_code <= "0101"; -- 5
when "1101" => key_code <= "0110"; -- 6
when "1110" => key_code <= "0000"; -- B
when others => null;
end case;
key_state <= pulse_row_3;
when pulse_row_3 =>
key_row <= "1101";
key_state <= read_row_3;
when read_row_3 =>
case key_col is
when "0111" => key_code <= "0111"; -- 7
when "1011" => key_code <= "1000"; -- 8
when "1101" => key_code <= "1001"; -- 9
when "1110" => key_code <= "0000"; -- C
when others => null;
end case;
key_state <= pulse_row_4;
when pulse_row_4 =>
key_row <= "1110";
key_state <= read_row_4;
when read_row_4 =>
case key_col is
when "0111" => key_code <= "1111"; -- *
when "1011" => key_code <= "0000"; -- 0
when "1101" => key_code <= "1111"; -- #
when "1110" => key_code <= "1111"; -- D
when others => null;
end case;
key_state <= pulse_row_1;
scan_complete <= '1';
when others => null;
end case;
end if;
end if;
end process key_scanner_sm;
debounce : process (clk)
begin
if clk' event and clk = '1' then
-- reset key_pulse
key_pulse <= '0';
if scan_complete = '1' then
-- shift in key_read
keyread_sreg3 <= key_read;
keyread_sreg2 <= keyread_sreg3;
keyread_sreg1 <= keyread_sreg2;
keyread_sreg0 <= keyread_sreg1;
-- vaild key press is a cycle of no keypress followed by 3 cycles of
-- detecting the same key pressed
if keyread_sreg3 = keyread_sreg2 and
keyread_sreg2 = keyread_sreg1 and
keyread_sreg1 /= keyread_sreg0 and
keyread_sreg0 = X"0" then
key_pulse <= '1';
key_code <= keyread_sreg3;
end if;
end if;
end if;
end process debounce;
end rtl;
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