Re: error in printing parasitices in cadence virtuoso
What do you mean under "i want to know parasitics"?
Parasitic extraction step (after having design LVS- and DRC-clean) will give you extracted netlist.
Post-layout circuit simulation, using that netlist, will take int account all the parasitics.
You can look into extracted netlist ("extracted view" - using parasitic prober in Virtuoso, or SPF/SPEF file - by inspecting this text file) to see the parasitic elements.
But there will be many of these R and C elements, and you need to use some other techniques if you want to make a sense out of that...
Max