semi_jl
Member level 4

Hi, everyone!
In Physical compiler, I encounter the error: current design is not a valid top-level physical cell.
But my current design is my top module, What is the error meaning?
Best regards, semi_jl!
In Physical compiler, I encounter the error: current design is not a valid top-level physical cell.
But my current design is my top module, What is the error meaning?
Best regards, semi_jl!