elastic buffer design
The Elastic Buffer operates as an asynchronous FIFO. It converts the data coming into the Receiver in the receiver clock domain to the System Clock domain. The Elastic Buffer also performs Clock colerance Compensation. It compensates for
difference in frequencies between the recovered clock (WClk) and the system clock (RClk).
Added after 10 minutes:
As to implementation, you can insert unsued data ,such as 'SKIP' in your income bits stream, when the wclk is faster than rclk, the data in async FIFO will be accumulated more and more. So when you find the incoming data is 'SKIP', you can discard it , that is to say stopping wptr for one cycle. If wclk is slower than rclk, the accont of data in FIFO will decreased, when the account decreases to some limit, insert 'SKIP' on the rx side. Thus balance the frequence difference.