Hi,
Can I use modelS/Im to simulate edif files .
i am using Active H/D/l for edif simulation.
After FPGA synthesis (output netlist is in edif format )how can simulate it with model/sim.
If I cant. Is there any other way to verify synthesisd output with modelsim
Normally you can make a past synthese simulation with the edif file in ModelSim. But this simulation takes really a long time.
But I'm sorry, I don't know that it goes, but not how. I have a look in the ModelSim Tutorial and the I ask you what you have to do!!