vahidkh6222
Full Member level 2

pci testbench
hi all.
in my BSc project i must implement a 33Mhz PCI target interface using a spartanII FPGA.
i have done the PCI-core VHDL design.... i did this step by step just like specification in a hierarchical manner...
but know i need a dynamic testbench to test wut i developed. i dont exactly know the real transactions occur on a bus by master, interrupt controller AND etc...
does anyone know a ready to use testbench or at least have a refrence to implement such a functionality?.
any better ideas?!!
thanks in advance.
hi all.
in my BSc project i must implement a 33Mhz PCI target interface using a spartanII FPGA.
i have done the PCI-core VHDL design.... i did this step by step just like specification in a hierarchical manner...
but know i need a dynamic testbench to test wut i developed. i dont exactly know the real transactions occur on a bus by master, interrupt controller AND etc...
does anyone know a ready to use testbench or at least have a refrence to implement such a functionality?.
any better ideas?!!
thanks in advance.