DSP: cascaded integrated comb filters

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casey480

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I'm trying to work out the output states for each stage of a CIC, and I'm a bit confused.

If an integrator looks like this:

**broken link removed**

And it's output is described as

Code:
 S1[n] = S1[n-1] + X1[n]

If you cascaded two of them, the output of the second stage:

Code:
 S2[n] = S2[n-1] + X2[n]

substituting

Code:
 S2[n] = S2[n-1] + S1[n-1] + X1[n]

Therefore, the addition is combinatorial, and the X1 input should ripple between stages.

The implementation I am analyzing does not do that, and has a register for each accumulator stage, therefore the input does not propagate. Is this correct? What am I missing?
 

Usually, you'll want to utilize the delay register to achieve pipeline action and connect the next stage at it's output rather than at the adder directly.

A separate pipeline register may be used, if the CIC integrator clock is as divided system clock.
 


the final equation is wrong!
Code:
S1[n] = S1[n-1] + X1[n]
S1[n-1] = S1[n-2] + X1[n-1]
S1[n] = S1[n-1] + X1[n] = S1[n-2] + X1[n-1] + X[n]
 

the final equation is wrong
Yes, you can't simply "substitute" a recursive expression. I also don't understand your calculation however.
 

FvM said:
the final equation is wrong
Yes, you can't simply "substitute" a recursive expression. I also don't understand your calculation however.

en, I correct my expression, the equation is not wrong, but makes more confuse of this. so, I suggest to use transfer function to solve it.

Code:
S1[n] = S1[n-1] + X1[n] = S1[n] * (z ^ -1) + X1[n];

S1[n](1 - (z ^ -1)) = X1[n]

H(z) = S1[n]/X1[n] = 1/(1 - (z ^ -1));

two cascade

Code:
F(z) = H(z) * H(z) = 1/(1 - 2 * (z ^ -1) + (z ^ -2)) = S2[n]/X1[n]

finally we can get

Code:
X1[n] = S2[n] * (1 - 2 * (z ^ -1) + (z ^ -2)) = S2[n] - 2 * S2[n-1] + S2[n-2];

then

Code:
S2[n] =  2 * S2[n-1] - S2[n-2] + X1[n];
 

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