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Another student corrected his own error like this..
Apparently, since I was not using the PMOS and NMOS from the gpdk180 lib, I shouldnt have used another via. I should've construtec the via inside the Nwell from the PMOS, instead of creating another via with a new Nwell or using a via M1_Nwell
Seems you didn't connect all PSUB connections (p+ contacts of NMOS bulk in substrate) to the same potential node (by metal), usually to GND.
(Bulk connections get a STAMP, and if PSUB connections are not connected to the same potential, this means there are MULTiple potentials for these STAMP connections, which is not allowed for PSUB.)
I know this error message text PSUB_STAMPERRORMULT (and similar DRC error messages) aren't too helpful, and generations of layouters have asked for its meaning, but unfortunately the DRC rules' writers always persisted (and still do so) on such cryptic error messages, even in eras when message text lengths aren't a big issue any more.