Hi
I am doing analog layout, am confused with metal width present in guard ring. s there any factors we have to consider while choosing width.
i thought it s fixed size, n little more than minimum width we have to choose. pls clear it.
What kind of guard ring do you mean? If it is only used to avoid latch up, i think there is no special rule for the width, because it is just a pick up function. If it is also used as the current path of ESD, it should be as wide as possible.
In this case the N-well guard ring is the bulk contact of the PMOS transistors (to be connected to VDD or to the PMOS sources). Minimum metal width is enough. Has nothing in common with ESD.