Double patterning and its impact

[shweta.bphc]

Hi,

I would like to know what is double patterning and how physical implementation flow is affected by it?

 

[artmalik]

double patterning is a fabrication processing step to print the features on the silicon properly. due to reduction in the feature sizes on the chip ( like poly length, metal widths etc), it is difficult to print them properly due to wavelenght of the light waves used for printing them. it complicates the DRC requirements as the double patterning puts constraints on what can be printed or not. But DRC changes are clubbed into one set. Double patterning makes the DRC complex.

As far as physical design work is concerned, it is all transparent. he has to just fix the DRCs.

 

[ThisIsNotSam]

double patterning is a fabrication processing step to print the features on the silicon properly. due to reduction in the feature sizes on the chip ( like poly length, metal widths etc), it is difficult to print them properly due to wavelenght of the light waves used for printing them. it complicates the DRC requirements as the double patterning puts constraints on what can be printed or not. But DRC changes are clubbed into one set. Double patterning makes the DRC complex.

As far as physical design work is concerned, it is all transparent. he has to just fix the DRCs.

It is not transparent. Placement and routing tools have to do a lot of things under the hood to make double patterning aware tasks.