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Hi
I want to know about the methodology for implementing & validating a fixed point dsp algorithm.
what should be the approach to validate the algorithms itself before implementing it into rtl. also what should be the methodology to verify the rtl.
thanks
anant
I believe it is quite different to verify an algorithm
from software or hardware points of view. From the software point of view, you do the debug things, but
if you want to implement your algorithm into hardware, say an ASIC, then there are many things to consider. You must know first how fast your harware can run, and you should plan what it should do for every clock cycle, that sort of things. After you finished your RTL (in Verilog or VHDL), you can verify them by simulation with testbench.
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