simulation backannote
Hi xworld2008,
Post P&R STA is to check that the layout implementation meet the timing requirement. The interconnect RC after P&R is different from the estimate before layout.
For sign-off, typically you have to use "sign-off quality" tool. The engines (timer, rc-extraction, noise etc) in a P&R tool is typically not good enough for sign-off. So use tool like star-rc or XRC to extract the RC of interconnect to a spef format. Read the spef into STA tool (e.g. PrimeTime). The STA tool can do the delay calculation and perform STA. At the same time, the STA tool can write out a SDF file for post-layout logic simulation.
Regards,
Eng Han