dipin
Full Member level 4
Hi,
I am trying to do a code for do division using verilog that is work with fpga. The thing is division operator is not syntyhesizable.I am using fixed point arithmetic to represent a number (includes fraction),think the only methode to do it is loop baised substraction methode or quotient remainder methodeIis there any other possibility
????please help me.
If i get (1/denominator) , then we can scale and can multiplay with numarator and can get the result .Is there any way to get it in FPGA..I dont want to use seperate module for that
regards
I am trying to do a code for do division using verilog that is work with fpga. The thing is division operator is not syntyhesizable.I am using fixed point arithmetic to represent a number (includes fraction),think the only methode to do it is loop baised substraction methode or quotient remainder methodeIis there any other possibility
????please help me.
If i get (1/denominator) , then we can scale and can multiplay with numarator and can get the result .Is there any way to get it in FPGA..I dont want to use seperate module for that
regards