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Displaying 4bit bcd on 2 7 segment displays using 7447 or similar ICS

omarshafiy15

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So basically I'm taking my first logic design course and we're required to make a 3x2 bit multiplier, and output the result using 2 segment displays, I'm confused as to how exactly i could do that since the output is a 5bit wide number with a don't care, hence a 4bit BCD to 7-segment IC being the logical choice and i can only use that to drive one display if i understand correctly.
This is my circuit but i am really confused as to how i can interface it with 2 7-segments as per the requirement for the project. Any help is much appreciated because our professor is not cooperative and unresponsive.
 

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What do you mean with "a 5bit wide number with a don't care"? Why do you think one bit is "don't-care"?
Should the product be displayed in decimal (difficult) or hexadecimal (easy with a chip like DM9368 instead of 7447)?
 
Are you familiar with IC's such as 4511, 4543, 7447? One of these intermediary IC's accepts a 4-bit nibble of binary (or BCD) and drives one 7-segment numeral. Sooner or later you can explore methods of multiplexing 2 or more digits.

BCD is done for us in the math operation IC's or logic gates. The 4-bit nibble you get from them should not need conversion to go to a 4511 or 4543 or 7447.
 
Your 3 x 2 multiplier outputs a range of dec 7 x dec 3 = dec 0 - 21. As pointed out if MSB
is dont care then range to display is dec 0 - 15

So you need to build a 2 digit binary to bcd converter. Or display in hex on each digit, clue....but I guess
you are confined to displaying BCD.

Think wide, ask your self, can I use counters to extract digits, can I use a memory
device to do a look up table (LUT), can I use serial techniques......can I.....


Regards, Dana.
 
Last edited:
Are you familiar with IC's such as 4511, 4543, 7447? One of these intermediary IC's accepts a 4-bit nibble of binary (or BCD) and drives one 7-segment numeral. Sooner or later you can explore methods of multiplexing 2 or more digits.

BCD is done for us in the math operation IC's or logic gates. The 4-bit nibble you get from them should not need conversion to go to a 4511 or 4543 or 7447.
Okay thanks alot! that makes sense i saw the 7447 and will use it, but how do i output to 2 digits not 1? I can't seem to find a resource so any pointers are much appreciated!
 
What do you mean with "a 5bit wide number with a don't care"? Why do you think one bit is "don't-care"?
Should the product be displayed in decimal (difficult) or hexadecimal (easy with a chip like DM9368 instead of 7447)?
The sheet we're given specified the 7447 so i suppose we're limited to decimal
 
i saw the 7447 and will use it, but how do i output to 2 digits not 1?
Firstly it sounds as though your 'ones' column (least significant) data values A B C D are easy to access. These are BCD data. These bits go into one 7447 (pins 1 2 6 7) which feeds (pins 13 12 11 10 9 15 14, each needs a safety resistor about 330 ohms, seven required) a 7-sgmt numeral. 7447 is made for common-Anode type. You should choose a matching type of numeral. (Do not choose common-Cathode unless you're building a common-Cathode system, example 7448.)

For your 'tens' column you must gather the 'carry' (most significant) data lines from you math IC's to feed to a second 7447 which goes to another 7-segment numeral. Unused input pins must not be left floating. Connect unused inputs to zero.

Pins 4 and 5 give you an option to blank leading zeroes. It's a convenience you can implement or not as you wish.
 
What do you mean with "a 5bit wide number with a don't care"? Why do you think one bit is "don't-care"?
Should the product be displayed in decimal (difficult) or hexadecimal (easy with a chip like DM9368 instead of 7447)?
the don't care was apparently me being blind, my apologies, it is a 5 bit number that ranges from 0-21
 
You need 6 signals, 2 to the 10's 7447 and 4 to the 1's 7447.
The lowest bit (odd/even) is easy, just connect it from the multiplier to the 1's 7447.
Creating the other 5 signals from the 4 highest multiplier bits is a more complex problem.
What circuits are you supposed to use? Only simple gates?
Is this a simulation or do you build real hardware?
The old-school solution with simple gates is to make a Karnaugh map for each of the 5 wanted bits, each with 4 inputs.
4 inputs is the maximum for easy manual logic optimization with Karnaugh maps.
 
Don't underestimate the power of a LUT to translate one logic domain into another.

1716382568773.png


Think of the inputs as address into a memory (array), and output the logical desired based
on address state. You can do this in software, and expand the outputs into 8 (for
the segments). So you give it an address into array and it outputs the correct segment
values for that address (or 4 bit number). Eg. it translates your input state into a desired
output state. You obviously set the array values to do the correct translation for each state
of input (address) as part of setup.. Basically combinatorial logic done in software. This is
also done in HW often, think FPGA. So you can do solutions in SW or HW or a combo of both.

LUTs get much more interesting when you register the outputs and feed some outputs
back into address pins, then you have a state machine. But for this problem you do not
need to do this.


Regards, Dana.
 

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