BlackOps
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ddr leds
At this stage now, i am currently writing/reading from DDR SDRAM.
i have also added own peripheral for LEDs. This peripheral will take one byte of data from DDR SDRAM. and based on its value will turn specific LEDs ON or OFF.
i was referencing to your example of Adding VHDL design to Peripheral, from ur website. about multiplier...
ur multiplier takes 2 values multiplies them, and stores result in readFIFO.
but my peripheral, will take value from DDR, compare it, then turn ON specific LED. (before i succeeded in just writing data to DDR and reading it to UART)
i have organized everything, but at last stage, when i generate bitstream... i get errors:
i have added the following inthe user_logic.vhd of my peripheral:
and then mapped those ports like this:
do you have idea how to get rid of this error? any advice?
or maybe i should use readFIFO for mapping it onto the LED_xx ?
do u think it is a good idea to write data from controller to the peripheral hardware through readFIFO?
thanks!
At this stage now, i am currently writing/reading from DDR SDRAM.
i have also added own peripheral for LEDs. This peripheral will take one byte of data from DDR SDRAM. and based on its value will turn specific LEDs ON or OFF.
i was referencing to your example of Adding VHDL design to Peripheral, from ur website. about multiplier...
ur multiplier takes 2 values multiplies them, and stores result in readFIFO.
but my peripheral, will take value from DDR, compare it, then turn ON specific LED. (before i succeeded in just writing data to DDR and reading it to UART)
i have organized everything, but at last stage, when i generate bitstream... i get errors:
Code:
ERROR:NgdBuild:755 - "system.ucf" Line 302: Could not find net(s) 'LED_0' in the
design. To suppress this error specify the correct net name or remove the
constraint. The 'Allow Unmatched LOC Constraints' ISE property can also be
set ( -aul switch for command line users).
ERROR:NgdBuild:755 - "system.ucf" Line 303: Could not find net(s) 'LED_1' in the
design. To suppress this error specify the correct net name or remove the
constraint. The 'Allow Unmatched LOC Constraints' ISE property can also be
set ( -aul switch for command line users).
ERROR:NgdBuild:755 - "system.ucf" Line 304: Could not find net(s) 'LED_2' in the
design. To suppress this error specify the correct net name or remove the
constraint. The 'Allow Unmatched LOC Constraints' ISE property can also be
set ( -aul switch for command line users).
ERROR:NgdBuild:755 - "system.ucf" Line 305: Could not find net(s) 'LED_3' in the
design. To suppress this error specify the correct net name or remove the
constraint. The 'Allow Unmatched LOC Constraints' ISE property can also be
set ( -aul switch for command line users).
ERROR:Parsers:11 - Encountered unrecognized constraint while parsing.
ERROR:NgdBuild:19 - Errors found while parsing constraint file "system.ucf".
i have added the following inthe user_logic.vhd of my peripheral:
Code:
-- ADD USER PORTS BELOW THIS LINE ------------------
LED_0: out std_logic;
LED_1: out std_logic;
LED_2: out std_logic;
LED_3: out std_logic;
--USER ports added here
-- ADD USER PORTS ABOVE THIS LINE ------------------
and then mapped those ports like this:
Code:
--USER logic implementation added here
leddata_0: leddata
port map (
Clk => Bus2IP_Clk,
a => WFIFO2IP_Data(0 to 7),
led0 => LED_0,
led1 => LED_1,
led2 => LED_2,
led3 => LED_3);
do you have idea how to get rid of this error? any advice?
or maybe i should use readFIFO for mapping it onto the LED_xx ?
do u think it is a good idea to write data from controller to the peripheral hardware through readFIFO?
thanks!