Direct Digital Synthesizer

[ali ghafoor]

how to extract the Lock Time information from DDS datasheet. i am using ad9915..if i program it using its parallel port..how much time it takes to transit from one frequency to another frequency(that is called its lock time)?? minimum write time for ad9915 is 10.5 nsec according to datasheet..and i need to write two times to update FTW (FTW=32 bits and ad9915 supports writing 16 bits in one clock cycle). will the lock time be equal to 21 nsec?? i am using system reference clock=2.5 GHz

 

[albert22]

As far as I know. Lock time only applies if you are using a PLL. The DDS by design does not have a lock time. The time it needs to change the frequency is just the time to update the phase increment register. Which is added to the phase accumulator on each clock pulse. Frequency changes immediately . Some DDSs update this register on the overflow of the phase register, that is, at the start of a new cycle. The ad9915 seems to have another delay as a result of its pipeline architecture. But it will not change frequency gradually as a PLL would do.