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Direct Digital Frequency Synthesizers (DDFS)

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TinkerBell

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Hi all,
This is my first post.I am new to this topic.Can somebody throw me some light on implementing DDFS using different algorithms in verilog ? I want to generate a sine wave but I am not able to do it in Model Sim.My DAC output is in the form of bits instead of a wave.So I have a doubt if Model Sim supports analog.I read few posts on this topic but I am still not clear. I am not interested in using Verilog-A or Verilog-AMS.Is there any other method of generating a sine wave instead of using CORDIC or LUT in verilog ? Can we use PWM for DAC ?
I will be happy if i get a reply.

Thanks in advance,
Tink.
 
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I'm not sure I understand your question; ModelSIM is not used to 'generate' signals, it simulates HDL, right? Your HDL generates the sinewave.

I am not that familiar with ModelSim (I use Aldec Active-HDL). In Active HDL you can specify the output to be displayed as an analog value; I'd have to believe there is someway to do this in ModelSim also.

Are you targeting an FPGA or are you creating an ASIC? FPGA vendors have configurable DDS IP that you can just drop into your design. However, if you're building your DDS from scratch, I can give you some guidance.

Barry
 
Hi Barry,
Nice to hear from you.Yes, your right...There should be some way to view a sine wave in ModelSim.In the wave properties dialog box,I find these...

1.analog step
2.analog interpolated
3.analog backstep

Can you pls tell me the significance of using each option ? And yes, I am building my DDFS from scratch and I will be grateful to get some help.Thanks a ton !

Regards,
Tink.
 
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Since I don't know Modelsim, I can't help you there. Just try all three and see which looks right. Nothing is going to blow up.

Ok, here goes, a DDS is actually pretty simple. You basically need a Phase Accumulator(PA) and a Lookup table (memory). The output of the PA is the address for the lookup table. Assume the Lookup table stores the digital representation of one cycle of a sinewave. (You can actually store just a quarter-wave, but you need more logic). On every clock cycle the PA is incremented by some fixed amount, call it Phase Delta (PD). The larger PD is, the faster you'll step through the memory, and the higher the frequency of the produced sinewave. (If you vary PD, you can do Frequency Modulation.)

I'm not sure how much you know about DDS, but that's basically it. If you search the web, there's a lot of stuff out there. If you have any specific questions, feel free to ask.

Barry
 
Yeah I got it...Thanks alot..!!!..I am clear with your explanations.But I have some more doubts...So what does a Phase Accumulator exactly do ? What is the input to the phase accumulator ? And how does this phase value get converted to a continous amplitude by the look up table ? You say that only a quarter of the waveform is stored in the look up table.So do you mean that there is a phase shift after every quarter cycle,the same process gets repeated and that's how we get a sine wave ? I tried a code but my simulation results show a sort of saw tooth wave...So how do I get a sine wave ? Can you give me some explanation on this ? Thanks alot Barry !
PFA.
View attachment simulation.bmp

Regards,
Tink.
 
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Maybe a specific example will help. Forgot about the 1/4 wave for a moment, and assume you have a memory 16K deep x 16 bits. The 16K elements represent one cycle of a sinewave. Thus, the value of each element is:

MEM(n)=((2^16)-1) * sin(2*pi*n/(2^16))

The ADDRESS of the memory comes from your phase accumulator, which is simply an accumulator (an adder where one input is its previous output value and the other input is available to you). If your accumulator input is 1, then it will take 16K clock cycles to step through the entire memory. If you use, say, a 16.384MHz clock, you will get an output sinewave with a frequency of 1KHz.

Now if your input to the phase accumulator is 2, you will step through the memory in only 8K clocks, and your output will be 2KHz.

Does this make sense?

For the 1/4 wave version, you have to keep track of the value in the phase accumulator. First, it counts up to it's maximum value, which corresponds to the first 90 degrees of the sine. Then you DECREMENT the accumulator (your input to the accumulator changes sign), and you decrement down to zero. Now, you change your accumulator input back to positive, but you have to invert the output from your memory to get the third part of your sine. Finally, you change your accumulator input sign again, and generate your fourth part. You're now back to zero degrees.

hope this helps.

Barry
 

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