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difference between CML and CMOS

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HSD_analog

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what are CML based logic circuits ? and CMOS based logic circuits?
 

This question is too basic. You'd better search on google
 

CML is faster, but consumes more current than CMOS.
 

in CML your signal is represented by currents and not voltages. CML is faster and sometimes better for routing, but it has some disadvantages, power consumption for instance
 

For higher frequencies (>GHz) CML's power dissapation may be comparable or even less than CMOS.
 

cml input is basically a differential input stage with the
collectors open. So the mail structural difference is CML
most of the time is on a bipolar process.
 

CML : Current Mode Logic , or sometimes called SCL : Source Coupled Logic

1 - CML is differential circuits rather than single ended circuits as in standard CMOS, and so, it is more immune to common mode noise

2 - CML isn't rail to rail swing as in standard CMOS , this reduced swing helps in adding much less noise to the surrounding analog blocks

3 - CML is prefered in high frequency designs as it is less aggressive to the surrounding sensitive analog blocks , and it is less power consumption than the standard CMOS , however , as technology scales down , below 90 nm , standard CMOS becomes capable of operating at high frequencies with less power consumption
 

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