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Diff. pair layout for rail to rail operation

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student153

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Hi Everybody,
I am layouting a rail to rail op-amp. Obviously, at the input of OPAMP I have both NMOS and PMOS diff. pair in parallel. I want to use interdigitation technique for those diff. pair. Can any body suggest me how to layout those four input devices to make layout more symmetric.
 

student153 said:
Hi Everybody,
I am layouting a rail to rail op-amp. Obviously, at the input of OPAMP I have both NMOS and PMOS diff. pair in parallel. I want to use interdigitation technique for those diff. pair. Can any body suggest me how to layout those four input devices to make layout more symmetric.
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To maintain symmetric, do half part and repeat remaining part... !
 

you don't need to match the pmos to nmos. Just match nmos with common-centroid or interdigitizing and likewise for just the pmoses.
 

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