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dftadvisor help (urgent)

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urmish

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Hi,

I am trying to insert partial scan into my design of a processor (gate level net-list), but the tool says "Error: ATPG based scan identification is no longer supported"

However the other 4 types namely
full_scan
clock_sequential
sequential_transparent
wrapper_chains

seem to work fine

the command I use is

setup scan identification full_scan/clock_seq/seq_trans/wrapper_chain/sequential

The part in bold in the above command is the type of scan insertion

I wish to ask, does anyone else face this problem? Is this a licensing issue? Have the Mentor guys discontinued partial scan insertion or is it just for tools in the higher education program?

Also, can someone shed some light on how to use the wrapper_chains method since it does not identify any scan cells with simple usage.

Thanks,
urmish
 

Dftadvisor can't automatically create a scan chain with just the flip-flops you want. You either need to tell it which to exclude or which to include.
 

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