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DFT - are there any ways to improve fault coverage?

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sujittikekar1

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DFT fault coverage

I have 95.30% fault coverage. I used test point insertion method to improve it but didnt help much (it increased by .2% only) I have around 13k AN faults in design. Most of these are due to constraints blockage,which I used for scan mode. Does anybody know other ways to improve fault coverage?
Thanks in advance...
 

DFT fault coverage

try full scan in Tmax
 

DFT fault coverage

1) Try to remove all DRC vios firstly
2) Report all AU-fault, and check it
 

Re: DFT fault coverage

sujittikekar1 said:
I have 95.30% fault coverage. I used test point insertion method to improve it but didnt help much (it increased by .2% only) I have around 13k AN faults in design. Most of these are due to constraints blockage,which I used for scan mode. Does anybody know other ways to improve fault coverage?
Thanks in advance...


if you are using Fastscan .. run second pass to find out how much of coverage drop for each constraints like...

1. run with normal constraints

set sys m set

remove the existing constraint..

add pin cons <pinnname> CT1 --- this will add all the untestable to redunant fault list and you can see the coverage drop due to this pin cons
 

Re: DFT fault coverage

Thanks for reply. I am using sequential atpg. How to use full scan? what r the settings we have to use for that? Do I have to fix bi-di pins in my design? or do they get fixed automatically( I am talking in regard with stuck-at fault model).
Thanks in advance.
 

DFT fault coverage

Can you please tell which tool u are using ?
If u r using Tmax then following is the command for configuring
the scan chain,
set_scan_configuration <option>
 

Re: DFT fault coverage

I am using Tmax tool. I did not see set_scan_configuration command in Tmax? Do you talking about DC?
 

DFT fault coverage

run atpg full_sequential_only
 

Re: DFT fault coverage

I used command run atpg -auto_compression because I have compression mode in my design. will -full_sequential command work for compressed patterns?
 

DFT fault coverage

yes, i think so
try that may be taken a lot of time
 

Re: DFT fault coverage

Thanks. I will try that option. But will it improve fault coverage?
 

Re: DFT fault coverage

sujittikekar1 said:
Thanks. I will try that option. But will it improve fault coverage?

that's depends

I improve it by full scan
 

DFT fault coverage

Hello Friend,

Coverage depends on how best u've inserted the DFT logic.

If you want to improve coverage, follow the rules mentioned below.

**broken link removed**

Also, if u've fixed all ur violations with "test mode" signal.......it will effect ur coverage. If it is fine fixing ur dft drc violations using "scan enable", go ahead with that.
This way u can improve ur test coverage.

Rest play with the tool commands ....

Good Luck.

Sunil Budumuru
 

Re: DFT fault coverage

Hello,

I had the same problem with a atpg only resulting in 95% fault coverage.
I increased it to 98% by creating functional vectors from a SPICE simulation tool.
I dumped out the vectors to an evcd file and read it in with TMAX and used the fastest clock in system as the strobe event.

I hope that helps.
 

Low fault coverage doesnt depends on the ATPG Untestable faults. It will be due to tied, blocked, redundant faults.
Write out these faults and analyze.
Can also increase abort limit and try.
 

Pay more attention to the interface to the macros, memories etc... Those can easily decrease your coverage. Always generate the bist wrapper for memories with bypass mode implemented.
 

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