Designing Phase Detector using CML

[adsraj]

cml phase detector

What is the advantage of designing a digital Phase detector using Current Mode logic gates. My phase detector is operating in 2.5 Ghz

 

[uncle_urfi]

Re: Phase Detector using CML

After a certain frequency, the pure digital logic style detectors will not work and the logic gates will also consume a lot of power.

CML can go upto very high frequencies since it is "current mode" and consumes the same amount of power that does not increase linearly with increasing frequency.

Since you are already at 2.5 GHz, the application does not seem to be synthesis, but CDR. Ask yourself, if your current architecture would work at 10GHz and then use a CML latch to do the job.

Hope it helps.

 

[adsraj]

Re: Phase Detector using CML

Could you pl point me a document/link which gives basics of CML

 

[OS123]

I wish to join to that request,
If some can show me a useful link to a proper use of the CML technology, in emphasize on PFD implementation.
TNX