juneja
Junior Member level 2
Hi all!
I am trying to design a simple CIC decimation filter for my first order delta sigma modulator. Oversampling is 1024 and output is 1 bit. I tried to go with the standard theory for design. It gives 11 bits for 1st integrator, and 21 for the next. I am amazed over the fact that how can a 21 bit output be obtained when the modulator itself does not have such a high resolution? I mean... the modulator resolution itself is less than 12 bit. How can one extract a 21 bit output?
Please clarify. I am suspecting that some of the bit patterns at the output may be random in such a case.
Thanks in advance!
I am trying to design a simple CIC decimation filter for my first order delta sigma modulator. Oversampling is 1024 and output is 1 bit. I tried to go with the standard theory for design. It gives 11 bits for 1st integrator, and 21 for the next. I am amazed over the fact that how can a 21 bit output be obtained when the modulator itself does not have such a high resolution? I mean... the modulator resolution itself is less than 12 bit. How can one extract a 21 bit output?
Please clarify. I am suspecting that some of the bit patterns at the output may be random in such a case.
Thanks in advance!