Hi everyone,
See if you can make out anything of this problem in Verilog.
Design a clock in behavioral to display 24 hour time. The clock has a six digit display (sec., min., hours). There will be a time_set button, an alarm_set button, an hour_increment button, and a min_increment button. The alarm buzzer is being driven by a one bit output signal when alarm=time. The clock can be driven by a signal with a one second period. The set sequence for either time or alarm is: press set, hour_increment, min_increment, and set again to exit.
Design the clock using at least two modules (such as at least time and alarm).
Design the corresponding stimulus module. You need to generate appropriate vectors to set a time and an alarm of your choice.