ashyma
Newbie level 6
hello everyone=)
currently I am trying to re-simulate the results obtained in the paper: R. R. Harrison, “A low-power, low-noise CMOS amplifier for neural
recording applications,” in Proc. IEEE Int. Symp. Circuits and Systems,vol. 5, 2002, pp. 197–200. But i am having huge problems
1- I don't understand how the authors designed the OTA in figure 4. I dont understand how the aspect ratios were calculated i tried to follow the steps in the design paragraph but they are very confusing..
2- I don't understand how the aspect ratios for the MOS-Bipolar Pseudoresistor Elements in figure 1 were determined.. i mean based on what especially that there are no references in the paper on how they were determined..
Thanks a lot ...
currently I am trying to re-simulate the results obtained in the paper: R. R. Harrison, “A low-power, low-noise CMOS amplifier for neural
recording applications,” in Proc. IEEE Int. Symp. Circuits and Systems,vol. 5, 2002, pp. 197–200. But i am having huge problems
1- I don't understand how the authors designed the OTA in figure 4. I dont understand how the aspect ratios were calculated i tried to follow the steps in the design paragraph but they are very confusing..
2- I don't understand how the aspect ratios for the MOS-Bipolar Pseudoresistor Elements in figure 1 were determined.. i mean based on what especially that there are no references in the paper on how they were determined..
Thanks a lot ...