skywalkerluk
Newbie level 3
Hello eveyrone,
I would like to design a differential amplifier with passive resistor load, using the current mirror or a single NMOS as my constant current source. The figure is attached. I know that the transistor below node A should be biased in saturation in a current mirror. However, the simulated voltage at node A is very low and the transistor does not remain in saturation. In textbook or online exanple, a standalone current mirror has both drains of the two NMOS connected to Vdd (both in saturation), so this problem does not occur. How do I resolve this problem when I incorporate the current mirror into a differential amplifier shown in the figure? Thank you very much.
I would like to design a differential amplifier with passive resistor load, using the current mirror or a single NMOS as my constant current source. The figure is attached. I know that the transistor below node A should be biased in saturation in a current mirror. However, the simulated voltage at node A is very low and the transistor does not remain in saturation. In textbook or online exanple, a standalone current mirror has both drains of the two NMOS connected to Vdd (both in saturation), so this problem does not occur. How do I resolve this problem when I incorporate the current mirror into a differential amplifier shown in the figure? Thank you very much.