Sep 6, 2017 #1 T tisheebird Member level 5 Joined Feb 23, 2017 Messages 88 Helped 0 Reputation 0 Reaction score 0 Trophy points 6 Activity points 662 Hello everyone. I have to design a 8 bit Shift register in cadence virtuoso by using bus. I have made 1 bit SR and now planning to simulate the same 8 bit SR with same 1-bit SR. I don't need to cascade 8 1-bit SR. Just one time and it should automatically repeat. Please tell me with the steps: Cheers.
Hello everyone. I have to design a 8 bit Shift register in cadence virtuoso by using bus. I have made 1 bit SR and now planning to simulate the same 8 bit SR with same 1-bit SR. I don't need to cascade 8 1-bit SR. Just one time and it should automatically repeat. Please tell me with the steps: Cheers.
Sep 7, 2017 #2 erikl Super Moderator Staff member Joined Sep 9, 2008 Messages 8,108 Helped 2,695 Reputation 5,370 Reaction score 2,305 Trophy points 1,393 Location Germany Activity points 44,123 If you have a single bit shift register SR: The connectivity results from the io signal's bit order inherently.
If you have a single bit shift register SR: The connectivity results from the io signal's bit order inherently.