The reason you need the level shift in the bipolar design is to keep Q5 & Q6 out of saturation. Without the level shift the potential on the base of Q5 & Q6 will be too high which will lead to forward biasing the collector-base junction (saturation) of these transistors. This will kill your beta, Ft, thus the ac performance of these transistors.
On the other hand, for mosfet devices, there is no bipolar saturation effect. Therefore, you don't need a level shift, but just make sure that these devices are operating in the mosfet saturation region. The higher potential on the gate increases the overdrive (Vt+Vgs) of these transistors thus increasing the transconductance/current drive of these devices. Therefore, you can use a smaller device, with smaller parasitic capacitances, to switch the clock signal. One thing you will have to make sure is that your Vt+Vgs is so large that it will increase your Vds_sat voltage. The increase in Vds_sat for these transistors will decrease the voltage headroom of your current source mosfets. If the headroom of the current source mosfet decreases below its Vds_sat then your current source transistors will be taken out of the mosfet saturation region.