Design Compiler (Synopsys) -> Interview Questions

[ivlsi]

Hi All,

What questions might be asked in the interview for Synopsys Design Compiler Engineer (specially questions related to the flows)?

Thank you!

 

[sharath666]

1. Difference between target/link libraries.
2.How to solve timing issues?
3.What are the different kinds of cells used?
4.Characteristics of H & LVT cells.

 

[ivlsi]

How to solve timing issues?

Applying timing constraints, flat the design, logic cloning, rebalance registers/flops, usage of LVT & HVT libs...
What are other methods?
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What are the different kinds of cells used?

Are you about LVT/HVT cells?
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4. Characteristics of H & LVT cells

What are characteristics do they have?

Thank you!

 

[sharath666]

For the 1st q above: 2 more methods are there:ask the tool to put higher effort and cell sizing.
2nd q: Yes
3rd qower,leakage current,fast vs slow...

 

[ivlsi]

ask the tool to put higher effort and cell sizing

Can DC-T decide on the cells size?
What commands should be used?