delay PWM signal with a dead time

[KerimF]

Could you set Vcc for the gates at 3.3V? and drive the input also by 0/3.3 1 KHz ?

I see... you have predefined models... so what is next? ;-)

As you know, you can adjust the dead time by chosing a suitable value for C.

 

[yassin.kraouch]

yes when i see the datashhet it could work

---------- Post added at 17:15 ---------- Previous post was at 17:13 ----------

the problem is that when i change the amplitude of the pulse i have not the right PWM signal

 

[KerimF]

Sorry I thought you meant a XOR gate ... it is just a dual MOSFET gate! I think we will need 3 gates, one to act just as an inverter.

I forgot that the input gate of a MOSFET only is not like the input of a XOR gate for example. You know the input of a logic gate is symetrical between Vcc and ground.

In my opinion, if you can't get a XOR IC (as CD4070 or equivalent from other CMOS series) or a XNOR (NOT XOR as CD4077... ) which can be supplied by 3.3 V (CD4000 is ok for this), then you may need to look for another solution.

 

[yassin.kraouch]

no this circuit can resolve the problem but just we need to fix the value of R and C to obtain the two PWM signal,

 

[KerimF]

You mean to use NMOS transistors?

This may work if the threshold voltage is not sensitive to temperature and the edges of the output pulses are fast enough.

 

[yassin.kraouch]

yes the out1 and out2 of this circuit will drive two NMOS transistor, so if i fix the value of the resistance and capacitor i will drive correctly the NMOS

---------- Post added at 17:33 ---------- Previous post was at 17:32 ----------

yes i need help now juste to fix the value of R and C for an amplitude of the pulse about 3 V

 

[KerimF]

Sorry, I mean how do you look to get out1 and out2... also from NMOS transistors as of FDC6401

 

[yassin.kraouch]

yes yes i obtain out1 and out2 from the logic OR and this will supply the gate of the two MOSFET

 

[jpanhalt]

You have not said what your load is, what voltage will go to it, nor the configuration of the mosfets. That information is absolutely critical for reasons stated in post #3 to evaluate your design. If one mosfet is sourcing current, in all likelihood, you will not be able to drive it from the logic signal you have shown.

John

 

[yassin.kraouch]

You have not said what your load is, what voltage will go to it, nor the configuration of the mosfets. That information is absolutely critical for reasons stated in post #3 to evaluate your design. If one mosfet is sourcing current, in all likelihood, you will not be able to drive it from the logic signal you have shown.

John

it is a problem, i know the configuration of the MOSFET, and just i need to design this part

 

[KerimF]

If someone asks me to design a part... it would be impossible for me to do it... unless I get 3 main info:
... what is at its input.
... what is at its output.
... and its function between input and output

So far in our case here, we have an idea on its general function (allowing dead time between its two complementary outputs) and its input is 0-3.3V from a uC, pulse width modulated with a period of 1ms.


Kerim

Edited:
Perhaps you may like to upload the circuit you work on so far (don't forget the input and output parts ;-) I mean with the IC and transistor names)

 

[arcatus]

look at this

---------- Post added at 17:06 ---------- Previous post was at 17:03 ----------

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yassin.kraouch, what software you use in this picture for analogue analysis the circuit?
In advance, thank you for your answer.
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[alexan_e]

It is Labcenter Proteus https://www.labcenter.com/index.cfm