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Delay circuit in PLL at the resest

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mytreyi

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Delay circuit in PLL

How to implement the delay circuit in the PFD at the reset....is it two inverters connected in series ?
 

this is one of the solutions. Alternatively, you can use the transmission gate.
 

Actually inverter provide very small delay,

Maybe you can use cap load to increase this delay.

I think normally the delay taken is in neno sec.

thanks
 

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