delay calculation in vhdl

Ponmalar21 · Jun 4, 2015

How to generate random delay in the VHDL code??

ultimate_kc · Jun 4, 2015

Ponmalar21 said:
How to generate random delay in the VHDL code??

First create a signal (for example - delay)
then pass values to this delay in process or where ever u need to pass

Code VHDL - [expand]
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signal delay;
delay <= "011"
if delay /= "00" then
   delay <= delay - 1;
else
   delay <= "111";
end if;

TrickyDicky · Jun 4, 2015

For synthesis or test bench?

Code VHDL - [expand]
1 2 3 4 5 6 7	signal delay; delay <= "011" if delay /= "00" then delay <= delay - 1; else delay <= "111"; end if;

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