delay calculation in vhdl

[Ponmalar21]

How to generate random delay in the VHDL code??

 

[ultimate_kc]

How to generate random delay in the VHDL code??

First create a signal (for example - delay)
then pass values to this delay in process or where ever u need to pass

---

Code VHDL - [expand]
1
2
3
4
5
6
7
signal delay;
delay <= "011"
if delay /= "00" then
   delay <= delay - 1;
else
   delay <= "111";
end if;

---

 

[TrickyDicky]

For synthesis or test bench?