Definition of STatic Phase Error in a PLL charge pump

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ashishjain_1000

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pll static phase error definition

Hello,

I have a question.Static phase error spec makes sense only in the PLL locked condition i.e CP output voltage in locked condition or should it be checked @ 0 and Max CP output voltage?Please comment in this regard...

Regards,
Ashish.
 

only when the pll is locked
 

Only in locked state! and Actually ABSOLUTELY NEEDED to keep on because this ERROR is what excites the VCO input...
 

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